Allen, TX 75013 * (214) 267-8595 * mark at masonworld.com
Semiconductor Design, Manufacturing, and Engineering
Innovative, decisive, and results-driven semiconductor professional with progressive leadership experience and exemplary qualifications to support critical semiconductor programs, projects, and initiatives involving device manufacturing and process engineering in demanding and deadline driven environments. Exceptional communication skills. Achieves success by helping others be successful. Eager to contribute diverse talents toward collaborating with a growth oriented organization to deliver comprehensive technology improvements and to achieve aggressive company and departmental goals and objectives. Utilize exceptional interpersonal skills to build productive relationships with customers, vendors, staff, and all levels of management.
* Enterprise-Wide/Global Projects
* DFM Methodologies/Processes
* Semiconductor Fabrication/FAB
* Lithography and Resolution Tech
* P&L/Budgets/Cost Reductions
* Project Management Lifecycle
* Integrated Circuit Manufacturing
* R&D Concepts to Manufacturing
* Technology Evaluation/Planning
* Problem Analysis/Resolutions
Director of Design Data Integration, Texas Instruments, Inc., Dallas, TX (2007 – Present)
Maintain full responsibility for the company-wide planning, direction, and overall accountability of a technology team charged with defining, developing, and implementing Design for Manufacturability (DFM), semiconductor test chips, advanced CMOS design kits (PDK), and projects involving silicon data business processes.
* Apply proven record of effective leadership to a global R&D environment, demonstrate capability to conceive, plan, and evangelize new research, and successfully transfer technology from research to manufacturing.
* Assess both current and future capability and capacity requirements in areas of resources, tools, and equipment, manage project budgets and schedules, and ensure alignment with corporate goals, projects, and priorities.
* Manage global supply chain and co-deveopment activities with multiple off-shore foundry suppliers.
* Facilitate and provide leadership to establish and maintain a positive working environment, build cohesive and effective engineering teams, and clearly communicate priorities and responsibilities to staff.
* Interact and collaborate regularly with executives and key customers and use excellent communications skills to negotiate and influence customers and management regarding matters of significance to the organization.
Resolution Enhancement Technology Manager (2000 – 2007)
Accountable for the development of RET strategies for 130 nm technology node through 45 nm node. Built and led the team that brought RET from an R&D concept to volume manufacturing. Solution space covered included Optical Proximity Correction (OPC), Phase Shift Masks (PSM), and Sub-Resolution Assist Features (SRAF).
* Developed process strategies for resolution enhancement techniques, supported relevant issues in production with reticle solutions, and oversaw implementation and maintenance of post-OPC verification (POV) strategy.
Photolithography R&D Engineer – SPDC / DMOS4 (1993 – 1999)
Directly responsibility for ownership of photolithography systems, tools, and processes including system support for continuous improvements, determining best practices for photolithography procedures, troubleshooting and implementing solutions for photolithography issues, and designing experiments.
* Applied solid understanding of photolithography requirements and timelines to collaborate with other engineers to identify new technology requirements and to develop new technologies to meet these requirements.
Education And Professional Interactions
Master of Science in Electrical Engineering (MSEE), Texas A&M University, College Station, TX (1991)
Two US Patents issued. List of publications and presentations available on request.